The present invention relates to a variable gain amplifier, and more particularly, to a variable gain amplifier preferably used in communication devices, such as portable telephones.
A variable gain amplifier is used in an automatic gain control (AGC) circuit of a send and receive unit of a portable telephone.
FIG. 1 is a schematic block diagram of a conventional variable gain amplifier 10. The variable gain amplifier 10 amplifies an input signal Pin while changing its gain in response to a gain control signal (a control input voltage Vc) and generates an output signal Pout. The variable gain amplifier 10 includes a plurality of (three in this case) unit variable gain amplifiers (hereinafter referred to as "unit amplifiers") 11, 12 and 13, a direct current (DC) amplifier 14 for producing a signal used to control respective gains in response to the control input voltage Vc, level shift circuits 15, 16 and 17 and voltage-limiting circuits 18, 19 and 20.
The DC amplifier 14 provides an amplified signal generated by amplifying the control input voltage Vc to each of the level shift circuits 15, 16 and 17. The level shift circuits 15, 16 and 17 level-shift the amplified signal by a predetermined DC voltage and generate level shifted voltages Vb1, Vb2 and Vb3, respectively. The voltage-limiting circuits 18, 19 and 20 limit the level shifted voltages Vb1, Vb2 and Vb3 from the level shift circuits 15, 16 and 17 to a constant DC voltage range and provide the limited control voltages Vc1, Vc2 and Vc3 to the unit amplifiers 11, 12 and 13, respectively.
FIG. 2(a) is a graph showing the relationships between the control input voltage Vc and the voltages Vb1, Vb2 and Vb3 of the level shift circuits 15, 16 and 17, and FIG. 2(b) is a graph showing the relationships between the control input voltage Vc and the control voltages Vc1, Vc2 and Vc3 of the voltage-limiting circuits 18, 19 and 20.
When the control voltages Vc1, Vc2 and Vc3 are generated, the unit amplifiers 11, 12 and 13 sequentially perform amplification operations together with the increase of the control input voltage Vc. As shown in FIG. 2(c), the variable gain amplifier 10 outputs the amplified signal having a substantially linear gain characteristic against the change of the control input voltage Vc.
However, in the high gain region (region where the control input voltage Vc approaches the maximum value), the noise factor of the conventional variable gain amplifier 10 increases. This is because the gains of the unit amplifiers 11 to 13 are limited in order to obtain the substantially linear gain characteristic of the variable gain amplifier 10. Thus, when the gain of the first unit amplifier 11 is increased to reduce the noise factor, the gain linearity deteriorates, and the noise factor deteriorates when the gain of the unit amplifier 11 is suppressed to improve the linearity.
Further, because each of the level shift circuits 15 to 17 level-shifts the input signal separately and generates the voltages Vb1 to Vb3, the switching timing of the unit amplifiers 11 to 13 is shifted as shown in FIG. 3(a) or FIG. 3(c) if the shift amount of each of the level shift circuits 15 to 17 is changed by process irregularities. FIG. 3(b) shows ideal switching timing. This impedes the linearity of gain characteristic. Further, when the limit values of the voltage-limiting circuits 18 to 20 have dispersion due to the process irregularities, the linearity of the gain characteristic is not adequate.